Magnetoresistive Random Access Memory (MRAM), based on the integration of silicon CMOS with MTJ technology, is a major emerging technology that is highly competitive with existing semiconductor memories such as SRAM, DRAM, and Flash. Similarly, spin-transfer (spin torque) magnetization switching found in STT-RAM and described by C. Slonczewski in “Current driven excitation of magnetic multilayers”, J. Magn. Magn. Mater. V 159, L1-L7 (1996), has recently stimulated considerable interest due to its potential application for spintronic devices on a gigabit scale.
Both MRAM and STT-RAM have a MTJ element based on a tunneling magneto-resistance (TMR) effect wherein a stack of layers has a configuration in which two ferromagnetic layers are separated by a thin non-magnetic dielectric layer. The MTJ element is typically formed between a bottom electrode such as a first conductive line and a top electrode which is a second conductive line at locations where the top electrode crosses over the bottom electrode. A MTJ stack of layers may have a bottom spin valve configuration in which a seed layer, a ferromagnetic “reference” layer, a thin tunnel barrier layer, a ferromagnetic “free” layer, and a capping layer are sequentially formed on a bottom electrode. The free layer has a magnetic moment that is either parallel or anti-parallel to the magnetic moment in the reference layer. The tunnel barrier layer is thin enough that a current through it can be established by quantum mechanical tunneling of conduction electrons. The magnetic moment of the free layer may change in response to external magnetic fields and it is the relative orientation of the magnetic moments between the free and reference layers that determines the tunneling current and therefore the resistance of the tunneling junction. When a sense current is passed from the top electrode to the bottom electrode in a direction perpendicular to the MTJ layers, a lower resistance is detected when the magnetization directions of the free and reference layers are in a parallel state (“1” memory state) and a higher resistance is noted when they are in an anti-parallel state or “0” memory state.
In a read operation, the information stored in a MRAM cell is read by sensing the magnetic state (resistance level) of the MTJ element through a sense current flowing top to bottom through the cell in a current perpendicular to plane (CPP) configuration. As the size of MRAM cells decreases, the use of external magnetic fields generated by current carrying lines to switch the magnetic moment direction becomes problematic. One of the keys to manufacturability of ultra-high density MRAMs is to provide a robust magnetic switching margin by eliminating the half-select disturb issue. For this reason, a new type of device called a spin transfer (spin torque) MRAM (STT-RAM) was developed. Compared with conventional MRAM, STT-RAM has an advantage in avoiding the half select problem and writing disturbance between adjacent cells. The spin-transfer effect arises from the spin dependent electron transport properties of ferromagnetic-spacer-ferromagnetic multilayers. When a spin-polarized current transverses a magnetic multilayer in a CPP configuration, the spin angular moment of electrons incident on a ferromagnetic layer interacts with magnetic moments of the ferromagnetic layer near the interface between the ferromagnetic and non-magnetic spacer. Through this interaction, the electrons transfer a portion of their angular momentum to the ferromagnetic layer. As a result, spin-polarized current can switch the magnetization direction of the ferromagnetic layer if the current density is sufficiently high, and if the dimensions of the multilayer are small. The difference between a STT-RAM and a conventional MRAM is only in the write operation mechanism. The read mechanism is the same.
A high performance MRAM MTJ element is characterized by a high tunneling magnetoresistive (TMR) ratio which is dR/R (also known as DRR) where R is the minimum resistance of the MTJ element and dR is the change in resistance observed by changing the magnetic state of the free layer. A high TMR ratio and resistance uniformity (Rp_cov), and a low switching field (Hc) and low magnetostriction (λs) value are desirable for conventional MRAM applications. For Spin-RAM (STT-RAM), a high λs and high Hc leads to high anisotropy for greater thermal stability. This result is accomplished by (a) well controlled magnetization and switching of the free layer, (b) well controlled magnetization of a reference layer that has a large exchange field and high thermal stability and, (c) integrity of the tunnel barrier layer. In order to achieve good tunnel barrier properties such as a specific junction resistance×area (RA) value and a high breakdown voltage (Vb), it is necessary to have a uniform tunnel barrier layer which is free of pinholes. Furthermore, electrical shunting must be minimized to avoid undesirable degradation of the magnetoresistive (TMR) ratio.
An electrical shunt is often observed as a “low tail” in the DRR (TMR ratio) vs. resistance in parallel state (Rp) plot as shown in FIG. 1. The cluster 3 of data points outside the main population 2 and spreading toward zero DDR and zero Rp is defined as the “low tail”. MTJs with this low tail population are undesirable for STT-MRAM applications since they have a small DRR as well as low Rp. This result occurs because as the electrical short (shunt) becomes greater, more current passes through the shunting pathways and does not contribute to tunnel magnetoresistance.
To our knowledge, current MTJ technology does not provide a means of minimizing the number of MTJ elements with a “low tail” character while maintaining high DRR. Therefore, an improved MTJ structure is needed to reduce the occurrence of electrical shunting which will in turn increase the yield of “good” MTJs that are acceptable for high performance devices.